Job
In this role, you will develop verification strategies and test environments to identify design defects while ensuring digital design quality through effective debugging techniques.
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Your role in the team
- In this position, you will be responsible for the verification strategy, testbench development, and sign-off readiness for assigned IPs, subsystems, or distributed systems.
- You will work closely with Digital Design Engineers and System Architects to identify design defects, close coverage gaps, and drive the adoption of best practices, automation, and scalable verification methodologies across projects.
- Own the verification planning process for assigned IPs and subsystems, including definition of verification scope, strategy, coverage goals, and resource requirements.
- Develop and maintain reusable verification environments, testbenches, verification components, and infrastructure using industry-standard methodologies and languages.
- Ensure complete verification of functional requirements through directed, constrained-random, assertion-based, and coverage-driven verification.
- Execute verification closure activities by tracking functional, code, assertion, and other relevant coverage metrics against defined project targets.
- Identify, analyze, and drive resolution of design defects through systematic debugging and root-cause analysis in collaboration with design engineering teams.
- Develop and integrate assertions, checkers, scoreboards, and protocol monitors to improve verification effectiveness and defect detection.
- Own regression management, including automation, execution monitoring, failure analysis, and reporting of verification status.
- Collaborate with system architects and design engineers to review specifications and ensure verifiable and testable design requirements.
- Support verification sign-off reviews by providing objective evidence of verification completeness, risk assessment, and residual defect analysis.
- Drive continuous improvement of verification productivity through automation, scripting, tool optimization, and reusable verification assets.
- Contribute to the evaluation, qualification, and deployment of new verification methodologies, tools, and technologies.
- Ensure verification deliverables meet project milestones while proactively identifying schedule, quality, and technical risks.
- Mentor junior verification engineers and provide technical guidance on verification planning, execution, debugging, and best practices.
Our expectations of you
Education
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related technical discipline.
Qualifications
- Strong expertise in SystemVerilog and UVM-based verification methodologies.
- Strong understanding of digital design fundamentals, RTL development concepts, and semiconductor development processes.
- Demonstrated expertise in functional and code coverage analysis and sign-off methodologies.
- Proficiency in scripting languages such as Python or Tcl, with familiarity with version control systems and regression management.
- Strong analytical and problem-solving skills with a systematic, detail-oriented approach.
- Excellent communication and collaboration skills with the ability to work effectively in global, cross-functional environments.
- Self-reliant work style with the ability to take ownership of complex verification tasks end-to-end and proactively identify risks.
Experience
- 5+ years of experience in digital IC verification within the semiconductor industry.
- Proven experience developing constrained-random, assertion-based (SVA), and coverage-driven verification environments.
- Hands-on experience with industry-standard simulators, debuggers, and waveform analysis tools.
- Experience debugging complex digital designs and collaborating with cross-functional engineering teams.
- Experience with SoC-level verification and complex subsystem integration projects.
What we offer
- Exciting opportunities to grow professionally and personally—in an international environment.
- Dynamic, collegial and open to new ideas – together, we are shaping the future.
- Flexible working hours, the option to work occasionally from home.
- Very good public transport connections and discounted parking with direct access from the office to the garage.
- Company doctor and psychologist – support for your health.
- All employees benefit from our success – together, we achieve more.
- Environmentally friendly commuting and staying fit – with us, you can lease a bike at an affordable price.
- Summer party, cool team events – we celebrate our successes together.
- From car washes to wellness days – enjoy a wide range of discounts.
- With us, you will receive an attractive gross annual salary starting at €70,000 (plus bonus, in accordance with the Metalworking Industry collective agreement). Depending on your experience, this may be higher.
Benefits
Work-Life-Integration
Food & drink
Higher take-home pay
Health, fitness & fun
Topics you will work on
Job locations
About your employer
Brunn Am Gebirge, Wien
The IMS Nanofabrication AG is a high-tech company based in Austria that specializes in innovations in lithography and nanotechnology. We have developed a strategically important technology in cooperation with world leaders in the semiconductor industry, which is urgently needed for the manufacture of semiconductor chips of the future.
- Established Company
- Full Remote, Hybrid, Onsite
- Industry, Production
Employer reviews
- Career growth
- 2.0
- Working conditions
- 2.9
- Team culture
- 2.6
- Engineering
- 1.9
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