Job
- Level
- Lead
- Location
- Villach
- Working Model
- Hybrid, Onsite
- Job Field
- IT, Security, Test/QA
- Employment Type
- Full Time
- Contract Type
- Permanent employment
Job Summary
In this role, you lead the digital verification of complex designs, plan and track verification activities, collaborate with cross-functional teams, and drive innovative improvements in verification processes.
Your role in the team
- Leiten Sie die digitale Verifikation komplexer digitaler und Mixed-Signal-Designs, einschließlich IPs, Subsysteme, ASICs und SoCs, und koordinieren Sie Aktivitäten wie Verifikationsplanung, Verifikationsüberwachung und -berichterstattung sowie anforderungsbasierte Verifikation.
- Collaborate with cross-functional teams, including concept, design, AMS verification, and post-silicon validation teams, to ensure high quality designs.
- Hands-on contributor to digital verification either from scratch, or using legacy verification environments and flows.
- Focus on the all-directions reuse of the Verification Components to be implemented.
- Identify and mitigate risks in dynamic projects, with proactive communication to the project team.
- Drive the improvements of existing verification processes, methodologies and flows, drive required innovation projects, focusing on efficiency improvement, and get buy-in from management.
- As a technical lead, inspire and mentor junior verification engineers while providing invaluable technical support and guidance to development teams and business partners.
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Our expectations of you
Education
- A university degree (Master's or higher) in Electrical Engineering, Physics, Material Science, or equivalent.
Qualifications
- Outstanding expertise in digital verification and all tasks needed to achieve design verification closure, including state-of-the-art tools and methodologies (SV-UVM, Xcelium, vManager, Certitude, etc.
- A sense of urgency for upcoming innovation in the field of verification.
- Self-motivated, flexible, good communication with interpersonal skills and is a good team player who can work well with both internal and external partners.
- Proven ability to achieve results in a very dynamic, multi-site environment and be able to coordinate with priorities and self-initiatives.
Experience
- 8+ years of Digital Verification experience and a deep understanding of all technical aspects of Verification for Mixed-Signal Designs, including 3+ years of leadership activities.
- Proven leadership skills, with experience in coordinating activities, providing technical guidance, and mentoring junior engineers.
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What we offer
- We offer competitive salaries and additional benefits based on your performance, experience, and qualification.
- The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group I.
- The monthly salary is paid 14 times per annum.
- We offer a higher compensation depending on your expertise and skills.
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Benefits
Higher Take-Home Pay
- 💻Company Notebook for Private Use
- 💰Bonus Commisions
- 💵Bonus Payments
- 👴🏻Company Retirement Provision
- 👷♂️Additional Insurance
Health, Fitness & Fun
Work-Life-Integration
Food & Drink
Topics You Will Work On
Job Locations
About Your Employer
Infineon Technologies Austria AG
Villach, Klagenfurt, Graz, Linz
Infineon Technologies Austria AG, with its headquarters in Villach, is a subsidiary of Infineon Technologies AG. Besides Germany, Austria is the only location where Infineon combines the skills for research and development, manufacturing and global business responsibility.
Description
- Language
- English
- Company Type
- Established Company
- Working Model
- Full Remote, Hybrid, Onsite
- Industry
- Industry, Production, Electronics, Automatization
Employer reviews
by devworkplaces.com
Total
(3 Reviews)3.0
Workingconditions
4.2Career Growth
2.6Culture
2.5Engineering
2.9
Principal Engineer Functional Digital Design Verification
- Location
- Villach
- Working Model
- Hybrid, Onsite
- Diversity
- Open for all genders
- English Only
- English only required
