Verilog Jobs in Austria

In this role, you will develop complex FPGA designs, integrate them into embedded system architectures, and perform testing and debugging while closely collaborating with interdisciplinary teams.

In this role, you manage the security requirements of embedded systems, develop innovative security mechanisms, and conduct risk assessments to optimize security designs.

In this role, you analyze tasks and create implementation proposals, develop digital hardware, and verify it using a structured testing approach, while closely collaborating with your mentor.

In this role, you will develop FPGA-based systems for Automotive Testing, design interfaces to hardware components, test high-speed communication, and implement prototypes.

In this role, you will develop complex SoC architectures and lead the team in integrating advanced microcontrollers through all phases from RTL generation to layout sign-off. Technical leadership and close collaboration are key.

In this role, you will develop software for laser beam scanning systems, design video pipelines using GPU acceleration, optimize algorithms, and integrate software components in a fast-paced development environment.

In this role, you design interfaces between hardware and software, testing high-speed communication for FPGAs, analyzing hardware components while planning and implementing prototypes.

Planning and implementation of interfaces between hardware components and computer-based systems. Design and test high-speed communication interfaces for FPGA subsystems. Measurement and analysis of hardware components. Planning, construction, and...

As a Design and Verification Senior Engineer, you will be part of an innovative team working on the development of advanced RF and microwave ICs. You will take on key responsibilities in design, verification, and validation of research results. Design...

Converting a computer vision and/or image signal processing algorithm into an FPGA implementation using System Verilog and Xilinx/Altera toolchains. Optimizing FPGAs for timing closure. Defining interface requirements for FPGAs in an imaging system...